XSA50 tips: vga and video frequencies

Recently I have been “playing” with this toy: XSA50 board by Xess.
Xess web site have several examples.

If you want to run some vga examples, VGACHARS VGABALL VGASTRIPES by RetroMicro,
remember to use a multifrequency monitor.
If you use an “old fashion” monitor, such D2851 by HP, you’ll see nothing at all. 😦
This happens because vga frequencies are: horizontal 62.5 KHz , vertical 119 Hz .
I suggest a more “modern” monitor, in order to handle these frequencies. 😉

If you want more “friendly” frequencies, managed by “old fashion” monitors, I used a flip-flop to get main clock halfed.
This way video frequencies are hor 31.2 KHZ, vert 60Hz.

Here is a test version of main vhd file chipIO.vhd .
Red colored code are mine updates… no warranty at all, of course.

disclaimer: it’s an pre-alpha-alpha-alpha-alpha-alpha version, no warranty at all, use at your own risk, etc etc.

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
use IEEE.numeric_std.all;

--
-- vgaBall Example Project
-- Doug Hodson, May 2003
-- www.RetroMicro.com
--
entity chipIO is

   port(
      pin_sysclk  : in std_logic;                      -- master clock from external clock source

      -- misc buttons and leds
      pin_pushbtn : in std_logic;                      -- push button on XSA board
      pin_led     : out std_logic_vector(6 downto 0);  -- 7-segment LED

      -- Flash RAM connections
      pin_flash_ce_n  : out std_logic;  -- chip-enable

      -- parallel port connections
      --parport_d: in std_logic_vector(7 downto 0);
      pin_parport_d : in std_logic_vector(4 downto 0);
      pin_parport_s : out std_logic_vector(6 downto 3);

      -- vga port connections
      pin_vga_red0     : out std_logic;
      pin_vga_red1     : out std_logic;
      pin_vga_green0   : out std_logic;
      pin_vga_green1   : out std_logic;
      pin_vga_blue0    : out std_logic;
      pin_vga_blue1    : out std_logic;
      pin_vga_hsync_n  : out std_logic;
      pin_vga_vsync_n  : out std_logic;

      -- SDRAM pin connections
      pin_sdram_clkfb : in std_logic;                   -- feedback clock with PCB delays
      pin_sdram_clk   : out std_logic;                  -- clock to RAM
      pin_sdram_cke   : out std_logic;                  -- clock-enable
      pin_sdram_cs_n  : out std_logic;                  -- chip-select
      pin_sdram_ras_n : out std_logic;                  -- RAS
      pin_sdram_cas_n : out std_logic;                  -- CAS
      pin_sdram_we_n  : out std_logic;                  -- write-enable
      pin_sdram_ba    : out unsigned( 1 downto 0);      -- bank-address
      pin_sdram_addr  : out unsigned(11 downto 0);      -- address bus
      pin_sdram_data  : inout unsigned(16-1 downto 0);  -- data bus
--      pin_sdram_dqmh  : out std_logic;                  -- DQMH
--      pin_sdram_dqml  : out std_logic;                  -- DQML

      -- RS232 port connections
      pin_rs232_rd    : in std_logic;                   -- receive data
      pin_rs232_td    : out std_logic;                  -- transmit data
      pin_rs232_cts   : in std_logic;                   -- clear to send
      pin_rs232_rts   : out std_logic;                  -- request to send

      -- XStend-2 SRAM connections
      pin_sram_ce_n   : out std_logic;                  -- chip enable

      -- PS-2 interface
      pin_ps2_data    : in std_logic;
      pin_ps2_clk     : in std_logic
   );

end chipIO;

architecture arch of chipIO is

	constant YES:	std_logic := '1';
	constant NO:	std_logic := '0';
	constant HI:	std_logic := '1';
	constant LO:	std_logic := '0';

   signal sysClk   : std_logic;  -- system clock
   signal sysReset : std_logic;  -- system reset

	component VGA_SYNC_NEW
		port(
		clock_25Mhz : in std_logic;
		red, green, blue : in std_logic;
		red_out, green_out, blue_out : out std_logic;
		horiz_sync_out, vert_sync_out : out std_logic;
		pixel_row, pixel_column : out std_logic_vector(9 downto 0));
	end component;

	signal vga_pixel_row     : std_logic_vector(9 downto 0);
	signal vga_pixel_column  : std_logic_vector(9 downto 0);
	signal vga_vert_sync_out : std_logic;

	component ball
   	port(
   	signal red,green,blue : OUT std_logic;
		signal vert_sync_out : in std_logic;
		signal pixel_row, pixel_column : in std_logic_vector(9 downto 0);
		signal myled     : out std_logic_vector(6 downto 0)  -- 7-segment LED
		);
	end component;

	signal ball_red   : std_logic;
	signal ball_green : std_logic;
	signal ball_blue  : std_logic;

signal pin_localclk      : std_logic;
signal XLXN_4   : std_logic;
signal XLXN_5   : std_logic;
attribute BOX_TYPE   : string ;

   component FTC_MXILINX_generale
      port ( C   : in    std_logic;
             CLR : in    std_logic;
             T   : in    std_logic;
             Q   : out   std_logic);
   end component;

   component VCC
      port ( P : out   std_logic);
   end component;
   attribute BOX_TYPE of VCC : component is "BLACK_BOX";

   component GND
      port ( G : out   std_logic);
   end component;
   attribute BOX_TYPE of GND : component is "BLACK_BOX";

begin

   XLXI_15 : FTC_MXILINX_generale
      port map (C=>pin_sysclk,
                CLR=>XLXN_5,
                T=>XLXN_4,
                Q=>pin_localclk);

   XLXI_16 : VCC
      port map (P=>XLXN_4);

   XLXI_17 : GND
      port map (G=>XLXN_5);

   -- disable flash and sram
   pin_flash_ce_n <= '1';
   pin_sram_ce_n <= '1';

   -- define system clock and reset
   sysClk   <= pin_sysclk;
   sysReset <= not pin_pushbtn;

	pin_vga_red0   <= '0';
	pin_vga_green0 <= '0';
	pin_vga_blue0  <= '0';

   --
   -- CREATE COMPONENTS
   --

	vgadriver:
		VGA_SYNC_NEW
		port map(
		clock_25Mhz    => pin_localclk,  -- sysClk,
		red            => ball_red,
		green          => ball_green,
		blue           => ball_blue,
		red_out        => pin_vga_red1,
		green_out      => pin_vga_green1,
		blue_out       => pin_vga_blue1,
		horiz_sync_out => pin_vga_hsync_n,
		vert_sync_out  => vga_vert_sync_out,
		pixel_row      => vga_pixel_row,
		pixel_column   => vga_pixel_column
		);

	pin_vga_vsync_n  ball_red,
   	green          => ball_green,
   	blue           => ball_blue,
		vert_sync_out  => vga_vert_sync_out,
		pixel_row      => vga_pixel_row,
		pixel_column   => vga_pixel_column,
		myled => pin_led
		);

end arch;

disclaimer: it’s an pre-alpha-alpha-alpha-alpha-alpha version, no warranty at all, use at your own risk, etc etc.

XSA manual xsa-manual-v1_2.pdf

Technorati tags: XSA, VHDL, VIDEO
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